Cache Inspector
Why this project?
Every software developer writes code that runs on a CPU — but most people never understand the invisible bottleneck beneath their code: the cache hierarchy. Why does iterating a 2D array row-by-row beat column-by-column by 3×? Why does vector<vector<int>> perform worse than a flat array? The answers all lie in how CPU caches work. Existing cache simulators are either heavy academic Java applications or dry command-line tools. This project brings interactive cache visualization to the browser with instant feedback on every memory access.
What is it?
Cache Inspector is a fully interactive CPU cache simulator. You type memory addresses, configure cache parameters (size, block size, associativity, replacement policy), and step through each access to watch the cache respond in real time. It shows you exactly why each access is a hit or miss — cold miss, conflict miss, or capacity miss — and visualizes the internal cache structure including sets, lines, tags, and valid bits.
How does it work?
- Address decomposition: Each memory address is split into
offset (bits within a block), index (which cache set), and tag (which memory region). The number of bits in each field is derived from your configuration.
- Cache lookup: On each access, the index selects the set. Within that set, tags are compared. A match = cache hit. No match = cache miss.
- Miss classification: Cold miss (block never loaded), capacity miss (cache too small), or conflict miss (set too small for working set under the given associativity).
- Replacement: When a set is full and a new line must be loaded, the policy (LRU, FIFO, or Random) selects which existing line to evict.
How to use it
- Configure the cache using the dropdowns at the top — adjust cache size, block size, associativity, and replacement policy.
- Enter memory addresses one at a time in the input box (hex like
0xA4 or decimal like 100), or use one of the preset patterns to explore different access behaviors.
- Click "Step" to process the next address. Watch the cache state update and the access log grow.
- Click "Play All" to auto-run through the entire queue with a configurable delay.
- Expand cache sets by clicking their headers to see individual cache lines with tags and valid bits.
- Check the Statistics panel for hit/miss rates and miss type breakdown.
- Experiment: Change the block size or associativity and re-run the same pattern to see how configuration affects performance.
- Use the Address Structure panel to see how each address breaks down into tag/index/offset bits for your current configuration.